Semiconductor devices are formed from a flat, thin wafer of a semiconductor material such as silicon. The wafer needs to be polished to have a sufficiently flat surface with no or minimal defects. Various chemical, electrochemical, and chemical mechanical polishing techniques are employed to polish the wafers. For many years, optical lenses and semiconductor wafers have been polished by a chemical mechanical means. In particular, with the rapid advancement in the field of semiconductor technology, very large scale integrated (VLSI) and ultra large scale integrated (ULSI) circuits have been developed. Accordingly, more elements can be integrated in a smaller area within a semiconductor substrate. As the density of the elements is increased, a higher flatness is required.
In chemical mechanical polishing (CMP), a polishing pad prepared from a urethane material has been used together with a slurry to polish the wafers. The slurry includes polishing particles, such as aluminum oxide, cerium oxide or silica particles, dispersed in an aqueous medium. The polishing particles generally range in size from 100 nm to 200 nm. The slurry further includes other agents such as surface acting agents, oxidizing agents, or pH controlling agents. The urethane pad is weaved to have channels or perforations helpful in distributing the slurry across the pad and the wafer and removing the slurry and slurry fragments. In one type of polishing pad, hollow, spherical microelements are distributed throughout the urethane material. As the surface of the pad is worn away through use, the microelements provide a continually renewable surface texture.
Meanwhile, copper has been increasingly used as a connection material due to its low resistance. Typically, an etching technique is employed to flatten conductive (metal) and insulating surfaces. In this regard, the CMP process causes many defects during polishing of a low-k material and a copper wire. If the low-k material is used for a copper inlay technique and the CMP process is performed, the low-k material may be deformed or damaged under a high mechanical pressure, so that a local defect may be formed in a substrate surface. Further, during polishing of the copper wire, a local defect such as dishing of the copper wire and erosion of a dielectric layer caused by overpolishing of the substrate surface may be formed. Furthermore, another layer such as a barrier layer may be removed in a non-uniform manner.
Korean Patent No. 10-1109376 provides a chemical mechanical polishing pad including open cells.